Armada-3900 Development Board Setup
===================================

The Armada 3900 Development Board are a series of configurable boards with different
configuations for different purposes
U-Boot supports a defined set of those configurations via different device tree files.

This document describes the board modifications required to setup each configuration and the
interfaces supported (or disabled in each one).

To switch board configuration:
1. Modify HW board settings according to the instructions in the "Board Setup" section below.
2. Modify the Device tree file used by U-BOOT during compilation:
   mvebu_db_armada8k_defconfig           - Choose Armada80x0/70x0 general defconfig
   export DEVICE_TREE=<device_tree_name> - Choose specific device-tree

Note:
Booting Linux requires using the same Device Tree configuration as used in U-Boot.

Board Setup Options
~~~~~~~~~~~~~~~~~~~

+---------------+-----------------------+-----------------------+
|		| 4: VD-A		| 4: VD-B		|
+===============+=======================+=======================+
|Device tree	| armada-3900-vd-A.dts  | armada-3900-vd-B.dts	|
+---------------+-----------------------+-----------------------+

The tables below summarize the interface configuration of each setup.

SerDes Configuration
~~~~~~~~~~~~~~~~~~~~

+---------------+---------------+---------------+
| CP0 Lane	| 3: VD-A	| 4: VD-B	|
+===============+===============+===============+
| 0		| PCIE0 (x1)    | PCIE0 (x1)    |
+---------------+---------------+---------------+
| 1		| USB3_HOST0	| USB3_HOST0	|
+---------------+---------------+---------------+
| 2		| SFI0 (5G)     | SFI0 (5G)	|
+---------------+---------------+---------------+
| 3		| UNCONNECTED	| UNCONNECTED	|
+---------------+---------------+---------------+
| 4		| SFI1 (5G)	| SGMII1 (1G)	|
+---------------+---------------+---------------+
| 5		| PCIE2 (x1)    | PCIE2 (x1)    |
+---------------+---------------+---------------+

Multi-purpose pin configurations
~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

+---------------+---------------+---------------+
|AP807 pin	| 1: VD-A	| 2: VD-B	|
+===============+===============+===============+
|	AP-SDIO | N/C           | N/C           |
+---------------+---------------+---------------+
|	AP-SPI0 | [0-3]         | [0-3]         |
+---------------+---------------+---------------+
|	AP-I2C	| [4-5]		| [4-5]		|
+---------------+---------------+---------------+
|	AP-UART0| [11,19]	| [11,19]	|
+---------------+---------------+---------------+

+---------------+---------------+---------------+
|CP0 pin:	| 4: VD-A	| 5: VD-B	|
+===============+===============+===============+
| CP-SPI1	| N/C		| N/C		|
+---------------+---------------+---------------+
| NAND		| [13,15-27]	| [13,15-27]	|
+---------------+---------------+---------------+
| SMI		| [32,34]	| [32,34]	|
+---------------+---------------+---------------+
| XSMI		| [35-36]	| [35-36]	|
+---------------+---------------+---------------+
| CP-I2C0	| N/C		| N/C		|
+---------------+---------------+---------------+
| CP-I2C1	| [37-38]	| [37-38]	|
+---------------+---------------+---------------+
| USB0_VDD	| [44]		| [44]		|
+---------------+---------------+---------------+
| USB1_VDD	| [45]		| [45]		|
+---------------+---------------+---------------+
| IHB_ENABLE	| [56]		| [56]		|
+---------------+---------------+---------------+
| IHB_RESET	| [57]		| [57]		|
+---------------+---------------+---------------+
| IOT_RESET	| N/C		| N/C		|
+---------------+---------------+---------------+
| ETH-PHY-RESET	| N/C		| N/C		|
+---------------+---------------+---------------+
| PPS-RESET	| N/C		| N/C		|
+---------------+---------------+---------------+
| CP-UART1	| [46-47,49,58]	| [46-47,49,58]	|
+---------------+---------------+---------------+
| CP-UART0	| [59-62]	| [59-62]	|
+---------------+---------------+---------------+

Network configuration
~~~~~~~~~~~~~~~~~~~~~

Setup 4 (VD-A):

+---------------+-------+---------------+---------------+-------------------------------+
| Interface	| CP#   | PPv2 Port     | GMAC Port     | Board Interface               |
+===============+=======+===============+===============+===============================+
| eth0		| CP0   | eth0          | 0             | SFI (5G)             		|
+---------------+-------+---------------+---------------+-------------------------------+
| eth1		| CP0   | eth1          | 2             | SFI (5G)			|
+---------------+-------+---------------+---------------+-------------------------------+

Setup 5 (VD-B):

+---------------+-------+---------------+---------------+-------------------------------+
| Interface	| CP#   | PPv2 Port     | GMAC Port     | Board Interface               |
+===============+=======+===============+===============+===============================+
| eth0		| CP0   | eth0          | 0             | SFI (5G)                      |
+---------------+-------+---------------+---------------+-------------------------------+
| eth1		| CP0   | eth1          | 2             | SGMII1 (1G)                   |
+---------------+-------+---------------+---------------+-------------------------------+

Notes:
	- (*) eth0/serdes2 are expected to run with 5G speed but u-boot can't dynammically change the
              serdes speed. It is configured with 1G and let Linux handle 5G task.
	- Equivalent of this configuration can be viewed in arch/arm64/boot/dts/mvebu/armada-cpn110.dtsi
	- eth0/1/2/3 may in fact be higher numbers, if prior eth_x interfaces already exist.


